dma_hw_t Struct Reference
Collaboration diagram for dma_hw_t:

Public Member Functions

 _REG_ (DMA_INTR_OFFSET) io_rw_32 intr
 
 _REG_ (DMA_INTE0_OFFSET) io_rw_32 inte0
 
 _REG_ (DMA_INTF0_OFFSET) io_rw_32 intf0
 
 _REG_ (DMA_INTS0_OFFSET) io_rw_32 ints0
 
 _REG_ (DMA_INTE1_OFFSET) io_rw_32 inte1
 
 _REG_ (DMA_INTF1_OFFSET) io_rw_32 intf1
 
 _REG_ (DMA_INTS1_OFFSET) io_rw_32 ints1
 
 _REG_ (DMA_TIMER0_OFFSET) io_rw_32 timer[NUM_DMA_TIMERS]
 
 _REG_ (DMA_MULTI_CHAN_TRIGGER_OFFSET) io_rw_32 multi_channel_trigger
 
 _REG_ (DMA_SNIFF_CTRL_OFFSET) io_rw_32 sniff_ctrl
 
 _REG_ (DMA_SNIFF_DATA_OFFSET) io_rw_32 sniff_data
 
 _REG_ (DMA_FIFO_LEVELS_OFFSET) io_ro_32 fifo_levels
 
 _REG_ (DMA_CHAN_ABORT_OFFSET) io_rw_32 abort
 

Data Fields

dma_channel_hw_t ch [NUM_DMA_CHANNELS]
 
uint32_t _pad0 [64]
 
uint32_t _pad1
 
uint32_t _pad2
 

The documentation for this struct was generated from the following file: